In an ATM network, data flows from memory on a host computer ("host memory") through an ATM interface to the ATM network. The ATM interface must package the stream of data it receives from the host memory into ATM cells prior to delivering the data to the ATM network. The stream of data may include data that is to be sent on numerous different channels within the ATM network. Therefore, the ATM interface must process and package the data based on the channels on which the data is to be transmitted.
FIG. 3 illustrates a typical ATM interface 100 that connects a host computer 101 with an ATM network 103. ATM interface 100 may either reside on the host computer 101 or on an interface card which plugs into a slot in the host computer 101. ATM interface 100 includes a DMA unit 102, a local buffer 104, a segmentation unit 106 and cell timers 108.
The DMA unit 102 is coupled to a host memory 116 on the host computer 101 over a system bus 114. The DMA unit 102 moves data from the host memory 116 to the local buffer 104. The local buffer 104 temporarily holds the data until the data is retrieved by the segmentation unit 106. The local buffer 104 couples the DMA unit 102 to the segmentation unit 106. The segmentation unit 106 is coupled between the local buffer 104 and the ATM network 103. Segmentation unit 106 retrieves the data from local buffer 104, packages the data into ATM cells, and transmits the ATM cells to ATM network 103.
The DMA unit 102, local buffer 104 and segmentation unit 106 constitute the data path between the host memory 116 and the ATM network 103. This same data path is used for all data sent from the host computer 101 through ATM interface 100 to the ATM network 103. However, the parameters which control the data flow between the host computer 101 and the ATM network 103 may be different for each channel. Thus, segmentation unit 106 may have to process data for one channel based on different parameters than data for another channel.
For example, each of the connections in an ATM network is typically set up with a desired data transmission rate. ATM interface 100 attempts to transmit cells for each connection at a rate which matches the desired transmission rate for the connection. In the illustrated ATM interface 100, the transmission rates for the various channels are controlled by cell timers 108. Each channel has a cell timer. Each cell timer transmits a cell transmit request to segmentation unit 106 to indicate that a cell should be transmitted on the channel that corresponds to the cell timer. Each cell timer is configured to transmit such requests at a rate that corresponds to the desired transmission rate associated with its channel. The various cell timers 108 compete with each other to request the segmentation unit 106 to transmit cells for their channels.
The efficiency of ATM interface 100 may be adversely affected if DMA unit 102 and segmentation unit 106 do not work together to ensure a smooth flow of data. For example, the bandwidth of the ATM network 103 will be underutilized if the segmentation unit 106 spends time trying to transmit data from a channel for which insufficient data is currently stored in local buffer 104. As mentioned above, the cell timers 108 transmit requests to the segmentation unit 106 to transmit cells for their corresponding channels. Once a request is received by segmentation unit 106, the segmentation unit 106 must retrieve a number of cell parameters for that particular channel. However, when a cell timer makes a request, the cell timer does not know if there is enough data stored in local buffer 104 to construct a cell for its channel. The segmentation unit 106 will waste time if upon reading those cell parameters, it is discovered that the local buffer 104 does not contain sufficient data for the channel to construct a cell for the channel.
Lack of cooperation between the segmentation unit 106 and DMA unit 102 may also lead to inefficiency in data transfers between the host memory 116 and local buffer 104. Specifically, each channel is allotted some fixed amount of memory in the local buffer 104. If the DMA unit 102 fills the memory for each channel randomly, the DMA unit 102 may begin to fill the local buffer memory for a channel even though the local buffer memory for that channel is almost full. When this occurs, the DMA unit 102 is only able to move a small amount of data into the local buffer. The DMA unit 102 would then have to save all the parameters for that channel and retrieve new parameters for another channel before beginning another data movement. When the DMA unit 102 is only able to move a small amount of data before switching to another channel, the DMA unit 102 is less efficient.
When there is data in the host memory 116 that is to be transmitted through ATM interface 100 to the ATM network 103, the host computer 101 sends signals to the ATM interface 100 indicating the data to be transmitted. When these signals arrive, the ATM interface 100 may not be able to immediately perform the specified transfer. For example, the DMA unit 102 of the ATM interface 100 may be busy transferring data from one channel, the segmentation unit 106 may be busy transmitting a cell from another channel, while signals from the host computer 101 indicate that data is to be transferred from host memory 116 to local buffer 104 for yet another channel. Under these conditions, the ATM interface 100 cannot immediately perform the data transfer for the host memory 116, but must remember that the data is to be transferred. Consequently, when DMA unit 102 becomes available, the appropriate data may be transferred from the host memory 116 to the local buffer 104.